A wireless communication device such as a mobile phone generally includes a nonvolatile memory as a data storage device. A NAND flash memory that is relatively inexpensive among the nonvolatile memories is often used as the nonvolatile memory mounted on the wireless communication device. In the NAND flash memory, when data is overwritten in an area to which data is already written, it is necessary to erase the data in the area before writing the new data. It is known that the throughput of data writing is greatly degraded because of the erase process. For example, the data writing speed in the NAND flash memory sometimes becomes lower than the data transfer rate between wireless communication devices. In this case, it is necessary to provide a temporary buffer of large capacity that stores the received data during the data-erase waiting time in a wireless communication device on the data reception side.
As the technique for increasing the data writing speed in the flash memory, for example, a method that uses a plurality of buffer memories with respect to a main memory is disclosed in JP-A 2008-204623 (KOKAI). Further, a method for providing an extra area in a memory is disclosed in JP-A 10-134559 (KOKAI).
However, in JP-A 2008-204623 (KOKAI), there occurs a problem that the circuit size is increased and the power consumption and cost are increased since it is necessary to prepare a plurality of buffer memories. Further, in JP-A 10-134559 (KOKAI), since it is necessary to provide a large extra area in the memory and perform preprocessing at the data write time, there occurs a problem that the latency until writing is started becomes long. Therefore, the communication device is required to have short latency until writing is started and to receive data at high speed even with a small circuit size.